so I'm imagining speedyOS which assumes one core for the OS, and runs its userspace jobs on the other cores, and if you wire a job to a core and its been coded to fit in L1/L2 then.. it just "does" -as long as the other jobs are somehow co-erced to run in the other cores, "swapping" in and out as need be. If you can prevent any clicktick disrupting your run state on this one "golden" user core, it just runs as fast as it can, subject to the OS timeslice effects on it, and any unavoidable synchronisation into other bits of the combined CPU/ALU/Memory/Bus system as a whole.